| High-Power Microelectronics Thermal Management I: Fundamentals of Electronics Cooling |
| Instructors: Professor S. M. You, University of Texas, Arlington and
Dr Seri Lee, Intel |
| Time: 8:00 AM – 10:00 AM |
Room: California West Room, Second Floor |
Abstract:
In the 21st century thermal management is becoming a bottleneck in further development and commercialization of advanced electronic products. Power dissipation, related to advanced computational and communicational capability, approached and exceeded 100W per chip in several occasions. This leads to higher component surface temperatures and thus requires better thermal design for lower operating temperatures. Despite this challenge, the
cost, volume, weight, and thermal budget available to provide more cooling power remain largely unchanged. Furthermore, in today’s highly competitive market, it became necessary for engineers who did not specialized in thermals to get involved in the subject area and often had to come up with solutions to the problems. Participants in Part 1 of this course will gain understandings of current and future technology trend and the heat transfer fundamentals associated with electronics cooling.
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| Some Thermal and Mechanical Issues That Arise in Three-D Packaging |
| Instructors: Professor Bahgat Sammakia; State University of New York-Binghamton and Professor Dereje Agonafer, University of Texas at Arlington |
| Time: 8:00 AM – 10:00 AM or 1:30 PM – 3:30 PM |
Room: California East Room, Second Floor |
Abstract:
To present an overview of thermal management issues, and thermo-mechanical issues that arise in 3-D packages. Heat transfer fundamentals and current state of the art solutions and algorithms as they apply to 3-D packages are presented. Specific interconnect technologies intended to address some of the 3-D related thermo mechanical issues are presented. The course is intended to benefit technical professionals and scientists who are experienced in or just starting to get involved in the thermal management of electronic packaging and are particularly interested in 3-D packaging. The course is augmented by the use of case studies based upon the extensive experience of the instructors both in their industrial as well as academic careers. Throughout the course the interactions between thermal, thermo mechanical and reliability issues are highlighted and demonstrated through examples and data.
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| Nano Scale Thermal Transport Modeling |
| Instructor: Cristina Amon, Carnegie Mellon University |
| Time: 8:00 AM – 10:00 AM |
Room: Elizabeth B Room, Second Floor |
Abstract:
This tutorial will present a comprehensive review of state-of-the-art techniques used in the computational modeling of sub-continuum nano-scale heat transfer with Boltzmann transport equation, lattice Boltzmann methods and atomistic molecular dynamics approaches. It will also outline the challenges to model nano-scale thermal transport and to integrate solutions across multiple length scales ranging from nanometers to macro scales. Relevant thermal
behavior in thin films, superlattices, magnetic assisted data recording, and silicon on insulator hot spots are discussed as well.
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| On-Chip Thermoelectric Cooling for Hot Spot Removal |
| Instructor: Professor Avram Bar Cohen; University of Maryland |
| Time: 8:00 AM – 10:00 AM |
Room: Elizabeth D Room, Second Floor |
Abstract:
Driven by shrinking feature sizes, microprocessor “hot spots” – with their associated high heat flux and sharp temperature gradients – have emerged as the primary “driver” for on-chip thermal management of today’s IC technology. Solid-state therm oelectric refrigerators, fabricated on the silicon chip, offer great promise for reducing the severity of on-chip “hot spots” and are attracting growing attention in the thermal packaging community.
Participants in this tutorial will be introduced to the physics underpinning Peltier cooling, along with the associated thermoelectric parasitic effects, and the ways that Thermoelectric/Thermionic cooling can be used to reduce the severity of on-chip hot spots. Attention will then be turned to the effects of microcooler, hot spot, and chip geometry,
as well as the electrical and thermal properties of the chip, on the hot spot temperature reductions that are achievable with single and multiple on-chip micro-coolers.
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| High-Power Microelectronics Thermal Management II: Applications of Electronics Cooling |
| Instructors: Professor S. M. You, University of Texas, Arlington and Dr Seri Lee, Intel |
| Time: 10:15 AM – 12:15 PM |
Room: California West Room, Second Floor |
Abstract:
In the 21st century thermal management is becoming a bottleneck in further development and commercialization of advanced electronic products. Power dissipation, related to advanced computational and communicational capability, approached and exceeded 100W per chip in several occasions. This leads to higher component surface temperatures and thus requires better thermal design for lower operating temperatures. Despite this challenge, the
cost, volume, weight, and thermal budget available to provide more cooling power remain largely unchanged. Aggressive use of best available thermal management techniques will be needed to assure successful development of the 21st century’s high-end electronic products. Part 2 of this course is to provide cost-effective design of thermal management systems for high-power electronic components. Participants will gain understandings of the capabilities
and limitations of fan-driven air-cooling systems. Completion of this course will also provide understandings of the thermal management techniques for future, practical liquid cooling systems. Heat spreading techniques and thermal interface materials will be also discussed.
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| Failure Analysis of PCB Packages |
| Instructor: Dr. Deepak Goyal, Intel |
| Time: 10:15 AM – 12:15 PM |
Room: California East Room, Second Floor |
Abstract:
Failure analysis of Printed Circuit Boards and packages that use similar technologies will be discussed. Keeping this as the objective, the seminar provides an overview of the failure modes and mechanisms observed in the packages using organic substrate / PCB technologies. A brief introduction to the methodology of failure analysis of microelectronic packages will be described. Emphasis will be paid to the tools and techniques currently used and the
future direction for the tools and techniques required for emerging package technologies.
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| Tutorial on Numerical MET HODS in Micro- and Nano-Scale Thermal Transport |
| Instructors: Professor J Murthy, Purdue University and Professor L. Pilon, Georgia Institute of Technology |
| Time: 10:15 AM – 12:15 PM |
Room: Elizabeth B Room, Second Floor |
Abstract:
In recent years there has been great interest in simulating flow and heat transfer phenomena on the micro- and nanoscale. These tutorial sessions present the basics of widely employed simulation techniques, including finite volume and discrete ordinates techniques, Monte Carlo methods, as well as molecular dynamics and atomistic simulations. The range of applicability of these methods, their advantages and shortcomings, as well as practical considerations
such as programming strategies and computational cost, will be discussed.
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| One Dimensional Modeling of Thermoelectric Modules |
| Instructor: Dr. Marc Hodes, Bell Laboratories, Lucent Techologies |
| Time: 10:15 AM – 12:15 PM |
Room: Elizabeth D Room, Second Floor |
Abstract:
The purpose of this (2 hour) tutorial is to provide practitioners of the thermal management of electronics and others with a straightforward methodology to model thermoelectric modules (TEMs) in all of their operating modes (cooling, heating and generation) with reasonable accuracy. First, the thermoelectric effects (Seebeck/Peltier/Thomson effects) and pertinent irreversible effects are introduced and categorized. Next, the construction, applications and
advantages and disadvantages relative to competing technologies (e.g., vapor compression refrigeration) of TEMs are discussed. Then, a simple heat conduction analysis of a TEM is conducted to enable the analysis of TEMs subjected to boundary conditions of the first kind on both of their substrates. Thereafter, the analysis is extended to thermal resistance boundary conditions on both substrates. Proper sizing of pellets in a thermoelectric module is covered and a representative example problem is worked out. Finally, recent developments in the field are discussed.
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| Microchannel Heat Sinks and Micropumps |
| Instructor: Professor Suresh Garimella, Prude University |
| Time: 1:30 PM – 3:30 PM |
Room: Elizabeth D Room, Second Floor |
Abstract:
This is one of two related short courses covering advanced cooling technologies for next-generation microelectronics systems. In this part, microchannel heat sinks, micropumps, and the design of integrated microscale cooling systems are reviewed. Microchannel heat sinks are widely regarded as being amongst the most effective heat removal techniques from space-constrained electronic devices. The fluid flow and heat transfer in microchannels, pumping requirements, and design of practical systems will be discussed in this short course.
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| Design of Experiments for Thermal Engineering |
| Instructor: Mr. James Petroski, GELcore |
| Time: 1:30 PM – 3:30 PM |
Room: California West Room, Second Floor |
Abstract:
This short course is intended to introduce people to the concept of Design of Experiments (DOE) and how it can be applied to thermal engineering for effective design and experimentation. Beginning with a discussion of effective experimentation, the class will progress through different types of experimentation used today, the role of statistics in planning experiments and the product designs they influence, to an overview of various types of DOE's. The course will then show the process of setting up a "typical" DOE and follow with two examples, one from an analytical thermal design using a DOE to an experimental DOE of a cooling system.
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| Micro/Nanotechnology in Electronics Thermal Management I: Fundamentals |
| Instructors: Professor K Goodson, Stanford University and Dr. R Prasher, Intel |
| Time: 1:30 PM – 3:30 PM |
Room: Elizabeth B Room, Second Floor |
Abstract:
The research community is experiencing a revolution in microscale and nanoscale heat transfer, with a focus on developing fundamental experiments and theoretical techniques. More recently, these advancements have begun to influence the design of electronic systems. This tutorial is part of a two part series focusing on the existing and future potential applications of microscale and nanoscale technologies on electronics thermal management. This first part provides an overview of fundamental physics of heat transfer at micro and nanoscales, with a focus on those relevant for electronics cooling. These include phonon generation and transport in transistors, electron and phonon interactions in thermoelectrics, conduction physics in nanoengineering interface materials, and the fundamentals of
two-phase microchannel convection.
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| Advanced Thermal Management Technologies for Next-Generation Microelectronic Systems |
| Instructor: Professor Suresh Garimella, Purdue University |
| Time: 3:45 PM – 5:45 PM |
Room: California West Room, Second Floor |
Abstract:
This is one of two related short courses covering advanced cooling technologies for next-generation microelectronics systems. In this part, a number of novel, high-performance cooling techniques for use in emerging applications will be reviewed. Critical enabling thermal management technologies including miniature heat pipes, piezoelectric fans,
transient phase change energy storage systems, porous thermal enhancement structures, interface contact conductance, and liquid cooling approaches will be discussed. This short course will introduce the design and experimental and computational analyses for these technologies.
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| Stress and Thermal Test Chips for Evaluation of Electronic Packaging Reliability |
| Instructors: Professor J Suhling and Professor R Jaeger, Auburn University |
| Time: 3:45 PM – 5:45 PM |
Room: California East Room, Second Floor |
Abstract:
Structural reliability and thermal performance of integrated circuit chips in electronic packages continues to be a major concern due to ever-increasing die size, circuit densities, power dissipation, operating temperatures, and the use of a wide range of low cost packaging materials. A powerful method for experimental evaluation of silicon die stress and temperature distributions is the use of test chips incorporating integral piezoresistive and thermal sensors. In this tutorial short-course, an overview will be presented on the state-of-the-art in the area of silicon stress and temperature sensor test chips. Developments in sensor theory and calibration methods will be presented, as well as
applications of test chips in various electronic packaging configurations including plastic packages, ball grid arrays, stacked die packages, and flip chip assemblies. In the absence of die failure, packaging induced stresses result in changes in the parametric performance of circuitry on the die. Methods for understanding these changes will be discussed, as well as the potential for developing innovative new sensors with smaller size and enhanced sensitivity.
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| Micro/Nanotechnology in Electronics Thermal Management II: Applications |
| Instructors: Professor K Goodson, Stanford University and Dr. R Prasher, Intel |
| Time: 3:45 PM – 5:45 PM |
Room: Elizabeth B Room, Second Floor |
Abstract:
The research community is experiencing a revolution in microscale and nanoscale heat transfer, with a focus on developing fundamental experiments and theoretical techniques. More recently, these advancements have begun to influence the design of electronic systems. This tutorial is part of a two part series focusing on the existing and future potential applications of microscale and nanoscale technologies on electronics thermal management. This second part focuses on the application technologies that are finding their way into industrial practice, including an overview of thermal design challenges for advanced transistors, on-chip thermoelectric cooling, advanced thermal interface materials, and high-performance microchannel heat sinks.
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| Thermo-Optic Behavior of Photonic Components - LED's, LD's and Waveguides |
| Instructor: Professor Avram Bar Cohen; University of Maryland |
| Time: 3:45 PM – 5:45 PM |
Room: Elizabeth Room D, Second Floor |
Abstract:
Polymer photonic components are poised to play a central role in the emerging photonics/electronics integration in telecommunication and high performance computing platforms. Recent success in the lamination of polymer planar waveguides into electronic PCB’s is setting the stage for widespread use of such polymer photonic components, most
notably polymer Bragg gratings. However, thermo-optical effects, induced by the intrinsic absorption of light in the polymer material and the temperature sensitivity of key properties, can significantly influence the optical performance of these gratings.
Participants in this tutorial will be briefly introduced to photonic technology, components, and packages, as well as to the physics underpinning the optical characteristics of Bragg gratings and the unique thermo-optical issues encountered in polymer Bragg gratings. Attention will then be focused on the effects of incoming Gaussian beams on the temperature and thermal expansion in the core of a polymer fiber Bragg grating and the Bragg wavelength shift, as well as changes in the spectral characteristics of the light reflected by the grating, that results.
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